Welcome to our Advanced Computer Architecture Group website. This home page is devoted to Advanced Computer Architecture Group(ACAG). In UC Irvine, we have developed several processors over the past several years (based on VLIW, superscalar, multithreaded, reconfigurable architecture, Morphosys, and MaRS). Currently, the main focus of our research is on the development of a multi core processor based on the notion of Networks-on-Chip. If you are interested in our past research, visit Here..

Director: Prof. Nader Bagherzadeh

Chip Multi-Processor Platform Homogenous/Heterogeneous CMP
Interconnection Network High performance Router Architecture
General Network Interface
GALS Architecture
Wireless NoC
High Performance Processing Element
General Purpose 32bit RISC Core
Task Scheduling Power Aware Scheduling
Divisible Load Theory
Intelligient Scheduling
NoC Tool Chain System Model
Application Model
NoC Simulator
Power Aware Design Power Aware Architecture
Power Aware Scheduling